A comparator that compares voltage levels of two input signals and outputs a comparison result is used widely. For example, a flash A/D converter includes multiple comparators. A 4-bit flash A/D converter, for example, includes at least 15 comparators. For the conversion of high frequency analog signals into digital signals, speeding-up of a flash A/D converter has been desired and, accordingly, a comparator which performs a high-speed operation has been desired.
Although a dynamic latch comparator is used as a comparator which performs a high-speed operation, a two-stage dynamic latch comparator has been proposed for further speeding-up and for reduction in electricity.
It is known that, in the process of fabricating a comparator, an offset due to variations in production or asymmetrical layout of transistors constituting the comparator exists and adversely affects a circuit operation. Then, various correction techniques to set the offset at zero have been studied. There is a desire of not only setting the offset at zero but also setting a threshold (an input voltage difference at which outputs are inverted) of the comparator at another value except zero without generating reference voltage. If the offset is adjustable, it is possible to set the threshold at a desired value.
Then, a technology is proposed in which an adjuster including a charge pump, a switch, and a capacitor is given from outside at a gate of a transistor forming an input differential pair in the two-stage dynamic latch comparator so that a threshold of the input differential pair is adjustable. It is also proposed that, in the two-stage dynamic latch comparator, a threshold of the comparator is made adjustable by connecting a variable capacitor to a signal node from a first stage to a second stage and adjusting a load of signal change.
However, a threshold variation is affected by corner conditions, temperature, power supply voltage, and the like of a transistor fabricating process. Recently, operating voltage is lowered to a value near the operating limit in order to reduce power consumption. However, with such low operating voltage, a threshold variation becomes relatively large and, therefore, the threshold variation does not necessarily take a desired value.
Japanese Laid-open Patent Publication No. 2010-109937, Japanese Laid-open Patent Publication No. 2010-223553, Japanese Laid-open Patent Publication No. 10-065542, Japanese Laid-open Patent Publication No. 2000-307391, Japanese Laid-open Patent Publication No. 2006-270726, Japanese Laid-open Patent Publication No. 2001-223754, Japanese Laid-open Patent Publication No. 2003-273938, Japanese Laid-open Patent Publication No. 7-193442, and D. Schinkel, E. Mensink, E. Klumperink, E. Van Tuiji and B. Nauta: “A Double-Tail Latch Type Voltage Sense Amplifier with 18 ps Setup+Hold Time”, IEEE, ISSCC 2007, Dig. Of Tech. Paper, pp. 314-315, February 2007 are examples of the related art.
Regarding making the threshold of the input differential pair be adjustable, the comparator described above has the following problems. Since an adjuster is connected from outside, a circuit area becomes large. Since a stationary current is made to flow outside, power consumption is increased. Regarding adjusting a threshold of the comparator, the comparator described above also has the following problems.
Since a capacitor is provided as a load to a current path of a signal, electric power is increased and operation speed is reduced.
Further, if the threshold is changed largely due to corner conditions, temperature, power supply voltage, and the like, a threshold variation exceeds an adjustable range and, therefore, desired setting is not possible.
The embodiments provide a comparator operable with low power consumption at high speed, in which offset is adjustable to zero or a threshold is settable at a desired level, and which may be used when a threshold variation is large.